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Biography
I am Cedar Ren. I write kernels and other systems code for high-performance LLM acceleration ASICs.
My interests include systems, hierarchies of abstraction, and various representations for encoding understandings of systems.
I’m interested in learning more about AI governance and AI-related policy. I think hardware security features like the Intel Management Engine, Trusted Platform Modules, and TDX (trusted domain extensions) can be potentially used to support AI governance and I’m happy to talk about how.
I feel at home with people who like words, numbers, and diagrams.
Download my resumé (1 page).
Download my CV (4 pages).
Nothing on this website represents the views of anybody but myself.
- Profiling
- ML security / reliability
- Software-hardware co-design
- Semiconductor Supply Chain
PhD in Computer Science, 2023
University of Virginia
BSc in Computer Science and Mathematics, 2019
College of William and Mary
Experience
- Simulator for high-performance LLM acceleration ASIC
- Quantization / Numerics
- Kernels and Dataflow
- Built ONNX->torch mlir conversion pipeline
- Implemented prefix-tree kvcaching (aka radix caching) for LLM serving tool
- Wrote infrastructure to cut down overhead around accelerated transformer kernels
- Profile workloads to generate architecture-independent workload summaries that use Basic Block Vectors to accurately predicts workload performance on novel hardware.
- Accelerate summary generation by 1,000,000x using hardware performance counters.
- Generate multi-platform executable benchmarks based on performance summaries using MLIR.
- Use differential privacy to enable trace-sharing across organizational boundaries without concern for leaking sensitive IP.
- Discovered I See Dead Micro-Ops, a critical security flaw that threatened execution integrity and data security in modern x86 processors. Published at ISCA 2021.
- Developed performance preserving Spectre defenses for SMT, published under SecSMT at USENIX Security 2022.
- Applying formal verification to ensure that quantized machine learning models remained invulnerable to adversarial attacks using DNNV (https://github.com/dlshriver/dnnv), ONNX, and ReluPlex (https://arxiv.org/abs/1702.01135)
- Mentoring 5 undergraduate students on computer architecture and machine learning projects, breaking down large projects into digestible chunks, as well as providing instruction on computer architecture, side-channel attacks, machine learning compilers, and ML models (incl. model specification, feature engineering, parameter tuning, and cross-validation).
